The present invention generally relates to a CAD (computer aided design) system for aiding a system designing of an electronic apparatus. More specifically, the present invention is directed to a system design/evaluation CAD system capable of optimizing an overall designing of an electronic apparatus, capable of improving designing qualities, and also capable of effectively performing a system designing, while being used in a design phase for considering a specification of such an electronic apparatus and an architecture. Furthermore, the present invention is related to a program storage medium capable of storing a program of such a system design/evaluation CAD system.
Conventionally, when physically realizable scales and power consumption of LSIs and printed circuit boards (PCBs), which constitute electronic apparatuses in earlier stages for designing these electronic apparatuses, namely in considering stages of specifications and architectures, physically realizable scales of respective structural elements are estimated on desk works while considering similar functions of the electronic apparatuses, PCBs, and LSIs which have been designed in past. Then, a calculation is made of scales when these structural elements are employed to assemble the final electronic apparatus. As a result, these estimations are largely influenced by experiences by designers.
In this case, physical parameters to be estimated are given as follows: There are gate counts (areas) and pin counts used to input/output of chips, power consumption of chips, delays (cycle numbers) in LSIs and FPGAs. Also, there are package areas when chips are mounted on PCB, total numbers of components mounted on PCBs, and a total number of connector pins which constitute inputs/outputs of PCBs. Also, cost information about the respective components may constitute estimation parameters.
For instance, while using a block diagram as shown in FIG. 21, functional arrangements of an apparatus are considered. As to boxes (symbols) corresponding to the respective blocks indicative of one function, multiplications are made of the above-explained physical parameters as estimation values, and the multiplied estimation values are collected. A hierarchical process is carried out in such a manner that a content of one box (symbol) in a block diagram is made further detailed, and the detailed box content is represented by a similar block diagram. In this case, also in a lower-graded hierarchy, the following method may be realized. That is, an estimation is made as to each of boxes, and then the estimated results are stacked on an upper-graded box.
Apparently, if the boxes (symbols), the respective functions of which have been designed in the past, are diverted, then the correct estimation result can be obtained from this information.
In an initial considering stage of designing an apparatus, physical feasibilities (total number of components, dimensions, heat, etc.) and cost in addition to functions/performance of this apparatus may constitute important considering elements. Also, optimum designs must be confirmed with a large number of patterns while changing an architecture of the apparatus, and a subdividing method of an LSI and a PCB.
In a conventional designing method, a block diagram shown in FIG. 36 is drawn, a parameter value of each block is estimated, and then these estimated parameter values are collected in a manual manner, or by using table calculation software.
As previously explained, in the conventional method, the respective blocks are estimated based upon experiences and intuition of the apparatus designers, and then the estimated blocks are built up. As a result, the conventional designing method owns the following problems:
1) Since the estimations are carried out based on the individual experiences of the designers, the estimation precision involves differences caused by individual designers. PA1 2) Since the design/estimation know-how is reserved in the individual designer, this know-how cannot be stored as commonly available information. PA1 3) In the case that the arrangement of the electronic apparatus is designed in a so-called "cut and try" manner, cumbersome/similar calculations must be repeatedly performed, which requires lengthy time, and also which involves calculation mistakes. PA1 4) The objective evaluation can be hardly made such that the calculated apparatus arrangement and the calculated architecture constitute optimum solutions. PA1 5) The design information such as the apparatus structural block diagrams formed in the specification studying stage could not be effectively utilized in the subsequent designing process. Accordingly, this formed design information is reentered to the CAD system in the downstream stage.
The present invention has been made to solve the above-explained problems, and therefore, has an object to provide a means capable of aiding by a computer, a system designing stage corresponding to an upstream stage of an apparatus designing process.